Computer system – Computer science – Vibrant Online Academy

Computer System Architecture. Test -1

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Category: Computer System Architecture

1. The 8-bit encoding format used to store data in a computer is ______

1. USCII

2. ANCI

3. EBCDIC

4. ASCII

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Category: Computer System Architecture

2. __________ is the bottleneck, when it comes computer performance

1. Memory cycle time

2. Latency

3. Delay

4. Memory access time

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Category: Computer System Architecture

3. The main virtue for using single Bus structure is ____________

1. None of these

2. Fast data transfers

3. Cost effective connectivity and ease of attaching peripheral devices

4. Cost effective connectivity and speed

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Category: Computer System Architecture

4. The logical addresses generated by the cpu are mapped onto physical memory by ____________

1. Relocation register

2. TLB

3. MMU

4. None of these

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Category: Computer System Architecture

5. A source program is usually in _______

1. Assembly language

2. Natural language

3. Machine level language

4. High-level language

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Category: Computer System Architecture

6. The spatial aspect of the locality of reference means ________

1. That the instruction executed will be executed at a later time

2. That the recently executed won’t be executed again

3. That the instruction in close proximity of the instruction executed will be executed in future

4. That the recently executed instruction is executed again next

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Category: Computer System Architecture

7. The algorithm to remove and place new contents into the cache is called _______

1. Renewal algorithm

2. None of these

3. Updation

4. Replacement algorithm

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Category: Computer System Architecture

8. ANSI stands for __________

1. American National Standards Institute

2. American National Standard Interface

3. American Network Standard Interfacing

4. American Network Security Interrupt

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Category: Computer System Architecture

9. 6. The minimum time delay between two successive memory read operations is ______

1. Cycle time

2. Delay

3. Latency

4. None of these

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Category: Computer System Architecture

10. The effectiveness of the cache memory is based on the property of ________

1. None of these

2. Memory size

3. Memory localisation

4. Locality of reference

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Category: Computer System Architecture

11. The write-through procedure is used ________

1. To write directly on the memory and the cache simultaneously

2. To write onto the memory directly

3. To write and read from memory simultaneously

4. None of these

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Category: Computer System Architecture

12. MFC is used to _________

1. Signal to the device that the memory read operation is complete

2. Issue a read signal

3. Signal the processor the memory operation is complete

4. Assign a device to perform the read operation

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Category: Computer System Architecture

13. ______ are used to overcome the difference in data transfer speeds of various devices.

1. Bridge circuits

2. Buffer registers

3. Multiple Buses

4. Speed enhancing circuitory

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Category: Computer System Architecture

14. Which memory device is generally made of semiconductors?

1. Hard-disk

2. RAM

3. Floppy disk

4. Cd disk

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Category: Computer System Architecture

15. The reason for the implementation of the cache memory is ________

1. The difference in speeds of operation of the processor and memory

2. To reduce the memory access and cycle time

3. To increase the internal memory of the system

4. All of these

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Category: Computer System Architecture

16. The ALU makes use of _______ to store the intermediate results.

1. Accumulators

2. Registers

3. Heap

4. Stack

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Category: Computer System Architecture

17. The duration between the read and the mfc signal is ______

1. Cycle time

2. Access time

3. Delay

4. Latency

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Category: Computer System Architecture

18. The temporal aspect of the locality of reference means ________

1. That the recently executed instruction will be executed soon again

2. That the recently executed instruction won’t be executed soon

3. None of these

4. That the recently executed instruction is temporarily not referenced

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Category: Computer System Architecture

19. The bus used to connect the monitor to the CPU is ______

1. Rambus

2. Memory bus

3. PCI bus

4. SCSI bus

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Category: Computer System Architecture

20. IBM developed a bus standard for their line of computers ‘PC AT’ called _____

1. IB bus

2. None of these

3. M-bus

4. ISA

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Category: Computer System Architecture

21. VLSI stands for ___________

1. Very Large Stand-alone Integration

2. None of these

3. Volatile Layer System Interface

4. Very Large Scale Integration

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Category: Computer System Architecture

22. The correspondence between the main memory blocks and those in the cache is given by _________

1. Locale function

2. Assign function

3. Hash function

4. Mapping function

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Category: Computer System Architecture

23. To extend the connectivity of the processor bus we use ________

1. PCI bus

2. Multiple bus

3. Controllers

4. SCSI bus

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Category: Computer System Architecture

24. The ______ format is usually used to store data.

1. Decimal

2. Hexadecimal

3. BCD

4. Octal

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Category: Computer System Architecture

25. The small extremely fast, RAM’s are called as _______

1. Accumulators

2. Stacks

3. Heaps

4. Cache

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UNIT – 1 Computer System

Computer System Architecture. Test -1