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Computer System Architecture. Test -1

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Category: Computer System Architecture

1. The effectiveness of the cache memory is based on the property of ________

1. None of these

2. Memory size

3. Locality of reference

4. Memory localisation

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Category: Computer System Architecture

2. The algorithm to remove and place new contents into the cache is called _______

1. Renewal algorithm

2. Updation

3. None of these

4. Replacement algorithm

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Category: Computer System Architecture

3. __________ is the bottleneck, when it comes computer performance

1. Memory cycle time

2. Memory access time

3. Latency

4. Delay

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Category: Computer System Architecture

4. The temporal aspect of the locality of reference means ________

1. That the recently executed instruction is temporarily not referenced

2. That the recently executed instruction will be executed soon again

3. That the recently executed instruction won’t be executed soon

4. None of these

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Category: Computer System Architecture

5. The duration between the read and the mfc signal is ______

1. Cycle time

2. Latency

3. Access time

4. Delay

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Category: Computer System Architecture

6. The small extremely fast, RAM’s are called as _______

1. Heaps

2. Accumulators

3. Stacks

4. Cache

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Category: Computer System Architecture

7. 6. The minimum time delay between two successive memory read operations is ______

1. Cycle time

2. Latency

3. None of these

4. Delay

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Category: Computer System Architecture

8. The write-through procedure is used ________

1. To write and read from memory simultaneously

2. None of these

3. To write directly on the memory and the cache simultaneously

4. To write onto the memory directly

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Category: Computer System Architecture

9. The logical addresses generated by the cpu are mapped onto physical memory by ____________

1. TLB

2. Relocation register

3. MMU

4. None of these

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Category: Computer System Architecture

10. VLSI stands for ___________

1. None of these

2. Very Large Stand-alone Integration

3. Volatile Layer System Interface

4. Very Large Scale Integration

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Category: Computer System Architecture

11. The main virtue for using single Bus structure is ____________

1. Cost effective connectivity and speed

2. Cost effective connectivity and ease of attaching peripheral devices

3. Fast data transfers

4. None of these

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Category: Computer System Architecture

12. A source program is usually in _______

1. High-level language

2. Natural language

3. Assembly language

4. Machine level language

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Category: Computer System Architecture

13. MFC is used to _________

1. Assign a device to perform the read operation

2. Signal the processor the memory operation is complete

3. Signal to the device that the memory read operation is complete

4. Issue a read signal

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Category: Computer System Architecture

14. IBM developed a bus standard for their line of computers ‘PC AT’ called _____

1. M-bus

2. IB bus

3. None of these

4. ISA

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Category: Computer System Architecture

15. ______ are used to overcome the difference in data transfer speeds of various devices.

1. Buffer registers

2. Bridge circuits

3. Multiple Buses

4. Speed enhancing circuitory

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Category: Computer System Architecture

16. The correspondence between the main memory blocks and those in the cache is given by _________

1. Hash function

2. Mapping function

3. Locale function

4. Assign function

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Category: Computer System Architecture

17. ANSI stands for __________

1. American National Standard Interface

2. American National Standards Institute

3. American Network Security Interrupt

4. American Network Standard Interfacing

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Category: Computer System Architecture

18. To extend the connectivity of the processor bus we use ________

1. Multiple bus

2. SCSI bus

3. Controllers

4. PCI bus

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Category: Computer System Architecture

19. The reason for the implementation of the cache memory is ________

1. All of these

2. To increase the internal memory of the system

3. The difference in speeds of operation of the processor and memory

4. To reduce the memory access and cycle time

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Category: Computer System Architecture

20. The bus used to connect the monitor to the CPU is ______

1. Memory bus

2. Rambus

3. SCSI bus

4. PCI bus

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Category: Computer System Architecture

21. The ______ format is usually used to store data.

1. BCD

2. Octal

3. Hexadecimal

4. Decimal

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Category: Computer System Architecture

22. The 8-bit encoding format used to store data in a computer is ______

1. EBCDIC

2. ANCI

3. ASCII

4. USCII

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Category: Computer System Architecture

23. The ALU makes use of _______ to store the intermediate results.

1. Registers

2. Heap

3. Accumulators

4. Stack

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Category: Computer System Architecture

24. The spatial aspect of the locality of reference means ________

1. That the recently executed instruction is executed again next

2. That the instruction in close proximity of the instruction executed will be executed in future

3. That the recently executed won’t be executed again

4. That the instruction executed will be executed at a later time

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Category: Computer System Architecture

25. Which memory device is generally made of semiconductors?

1. Floppy disk

2. Hard-disk

3. RAM

4. Cd disk

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UNIT – 1 Computer System

Computer System Architecture. Test -1